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Time step: 1u
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Display Node IDs in schematic (find out the ID of a node for graph & plot configuration)
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Components
Component ():
Value:
Voltage: V
Frequency: Hz
Phase: Deg
Color:
Assign an Edge ID
Edge ID:
(The purpose "Invisible Wire Edges" is to avoid cluttering the schematic with a multitude of wire connections. Draw two or more "Invisible Wire Edges" & assign them the same "Edge ID" - this will automatically create an "invisible" connection between the end points. Hovering on an "Invisible Wire Edge" reveals its hidden connections.)
OK

Wire
Invisible Wire Edge

Resistor
Capacitor
Inductor

DC Voltage Source
AC Voltage Source
Square Voltage Source
Ground

And Logic Gate
Or Logic Gate
Nand Logic Gate
XOR Logic Gate
Logic Inverter
Digital Comparator
SR Flip Flop
JK Flip Flop
D Flip Flop

Manual Switch
Voltage Controlled Switch

Seven Segment Display
Binary to 7-Segment Decoder
8-Bit Latch \ Register (74HC573)
4-Bit Multiplexer (74HC157)
Full Binary Adder
4-Bit Adder \ Subtructer (74HC83)
4-Bit Ripple Counter (74HC93)
256 Byte SRAM Memory
64 KB SRAM Memory
Custom Arithmetic Logic Unit

Text Label (annotation)
Border Area (annotation)
Note: wires or components connect only if the circular dots on their ends overlap (the dots, one end-dot from each of the would be connected wires or components, should overlap together).
Designed & Developed by
Daniel Chermetz (danielchermetz@gmail.com)
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